Modular Software Architecture for FPGA based Payload Module Computers

Modular structures are important for reducing the cost and the time it takes to design and build a satellite. In this thesis a modular software architecture for an FPGA based Payload Module Computer is derived.
The functionality of the design is demonstrated by using it for the payload module computer of the satellite Flying Laptop. The implementation is verified in different ways though simulations, a hardware in the loop test bench and end-to-end tests including the complete satellite and its corresponding ground station.
In the end the author shows the successful commissioning of the Payload Module Computer, respectively, the designed architecture, on the satellite Flying Laptop after its launch.