Transistor Level Modeling for Analog/RF IC Design | ISBN 9781402045561

Transistor Level Modeling for Analog/RF IC Design

herausgegeben von Wladyslaw Grabinski, Bart Nauwelaers und Dominique Schreurs
Mitwirkende
Herausgegeben vonWladyslaw Grabinski
Herausgegeben vonBart Nauwelaers
Herausgegeben vonDominique Schreurs
Buchcover Transistor Level Modeling for Analog/RF IC Design  | EAN 9781402045561 | ISBN 1-4020-4556-5 | ISBN 978-1-4020-4556-1
Leseprobe

„A comprehensive book on state of the art emerging MOSFET models for the design and simulation of analog, digital or RF Integrated Circuits.“ 
Narain Arora, Cadence Design Systems, California, USA

„This book covers modern topics in semiconductor TCAD, circuit simulation, compact models, RF modeling, etc. which are hard to find together anywhere else.“ 
Peter Bendix, Xpedion Design Systems, California, USA

Transistor Level Modeling for Analog/RF IC Design

herausgegeben von Wladyslaw Grabinski, Bart Nauwelaers und Dominique Schreurs
Mitwirkende
Herausgegeben vonWladyslaw Grabinski
Herausgegeben vonBart Nauwelaers
Herausgegeben vonDominique Schreurs
Among many great inventions made in the 20th century, electronic circuits, which later evolved into integrated circuits, are probably the biggest, when considering their contribution to human society. Entering the 21st century, the importance of integrated circuits has increased even more. In fact, without the help of integrated circuits, recent high-technology society with the internet, cellular phone, car navigation, digital camera, and robot would never have been realized. Nowadays, integrated circuits are indispensable for almost every activity of our society. One of the critical issues for the fabrication of integrated circuits has been the precise design of the high-speed or high-frequency operation of circuits with huge number of components. It is quite natural to predict the circuit operation by computer calculation, and there have been three waves for this, at 15-year intervals. The ? rst wave came at the beginning of the 1970s when LSIs (Large Scale Integrated circuits) with more than 1000 components had just been int- duced into the market. A mainframe computer was used for the simulation, and each semiconductor company used its own proprietary simulators and device models. However, the capability of the computer and accuracy of the model were far from satisfactory, and there are many cases of the necessity of circuit re-design after evaluation of the ? rst chip. The second wave hit us in the middle of 1980s, when the EWS (Engine- ing Work Station) was introduced for use by designers.