Synthesis and Optimization of FPGA-Based Systems von Valery Sklyarov | ISBN 9783319047089

Synthesis and Optimization of FPGA-Based Systems

von Valery Sklyarov, Iouliia Skliarova, Alexander Barkalov und Larysa Titarenko
Mitwirkende
Autor / AutorinValery Sklyarov
Autor / AutorinIouliia Skliarova
Autor / AutorinAlexander Barkalov
Autor / AutorinLarysa Titarenko
Buchcover Synthesis and Optimization of FPGA-Based Systems | Valery Sklyarov | EAN 9783319047089 | ISBN 3-319-04708-6 | ISBN 978-3-319-04708-9

Synthesis and Optimization of FPGA-Based Systems

von Valery Sklyarov, Iouliia Skliarova, Alexander Barkalov und Larysa Titarenko
Mitwirkende
Autor / AutorinValery Sklyarov
Autor / AutorinIouliia Skliarova
Autor / AutorinAlexander Barkalov
Autor / AutorinLarysa Titarenko

The book is composed of two parts. The first part introduces the concepts of the design of digital systems using contemporary field-programmable gate arrays (FPGAs). Various design techniques are discussed and illustrated by examples. The operation and effectiveness of these techniques is demonstrated through experiments that use relatively cheap prototyping boards that are widely available. The book begins with easily understandable introductory sections, continues with commonly used digital circuits, and then gradually extends to more advanced topics. The advanced topics include novel techniques where parallelism is applied extensively. These techniques involve not only core reconfigurable logical elements, but also use embedded blocks such as memories and digital signal processing slices and interactions with general-purpose and application-specific computing systems. Fully synthesizable specifications are provided in a hardware-description language (VHDL) and are ready to be tested and incorporated in engineering designs. A number of practical applications are discussed from areas such as data processing and vector-based computations (e. g. Hamming weight counters/comparators). The second part of the book covers the more theoretical aspects of finite state machine synthesis with the main objective of reducing basic FPGA resources, minimizing delays and achieving greater optimization of circuits and systems.